The reduction of noise and dark current in solid-state image sensors whilst still maintaining high dynamic range are of major interest. With reference to FIG. 1, state of the art Complementary Metal Oxide Semiconductor (CMOS) image sensors pixels 100 usually contain a photo-sensitive device 101 that may have charge storage capability, a transfer gate 102 controlled by a transfer control signal 112 enabling complete charge transfer from the photo-sensitive device onto a sense node 107; a reset switch 103, which is controlled by a reset control signal 111, whereby reset switch 103 is used for resetting sense node 107 to a fixed reset potential; a source follower buffer 104 and a pixel select switch 105 for coupling the pixel to a column line 108 shared between several pixels. A load device 106 such as a current source, combined to the pixel buffering transistor forms a source follower buffer, wherein 106 is usually connected to the column line.
An example operation sequence for this pixel would contain the steps of first integrating electrons generated by impinging light in the photo-sensitive device, subsequently activating pixel select switch 105 via a pixel select signal (not shown) then pulsing the reset control signal 111 of reset switch 103 in order to reset sense node 107 while pixel select switch 105 is still activated and finally pulsing transfer control signal 112 in order to transfer the integrated signal charge onto sense node 107 while pixel select switch 105 is still activated. By employing such a sequence, the reset level of sense node 107 as well as the sum of the reset level and the signal level corresponding to the light detected by photo-sensitive device 101 appear consecutively on the column line. Therefore, by computing the difference between said consecutively outputted sum and the reset level the signal level may be determined.
The above-described operating method is known as Correlated Double Sampling (CDS) and suppresses Fixed Pattern Noise (FPN) and reset noise corresponding to the sampled and held temporal noise of reset switch 103. Furthermore, a reduction of low frequency noise (mainly 1/f noise) of source follower buffer 104 is achieved.
White noise of source follower buffer 104 is another important noise source in state of the art solid state image sensors. Bandwidth engineering methods such as disclosed in European Patent 1 643 754 (Lustenberger et al.) may be applied to control the bandwidth and minimize white noise of the signals read out from the pixel whilst still maintaining a given pixel readout time, which is usually defined by the frame rate and pixel count or row count of the image sensor.
Downstream circuitry used for signal conditioning such as CDS, amplification and buffering introduces noise of various natures.
Pixel architectures using amplifiers and feedback capacitors forming capacitive feedback transimpedance amplifiers (CTIAs) are disclosed in European Patent 1 538 828 (to Watanabe) and in US Patent 2007/0108375 (to Olsen et al.). This architecture can provide pixel conversion factor independently of the sense node capacitance.